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Advanced Power MOSFET
FEATURES
Avalanche Rugged Technology Rugged Gate Oxide Technology Lower Input Capacitance Improved Gate Charge Extended Safe Operating Area Lower Leakage Current : 25 A (Max.) @ VDS = 800V Low RDS(ON) : 4.688 (Typ.)
SSW/I2N80A
BVDSS = 800 V RDS(on) = 6.0 ID = 2 A
D2-PAK
2
I2-PAK
1 1 3 2 3
1. Gate 2. Drain 3. Source
Absolute Maximum Ratings
Symbol VDSS ID IDM VGS EAS IAR EAR dv/dt PD TJ , TSTG TL Characteristic Drain-to-Source Voltage Continuous Drain Current (TC=25 C) Continuous Drain Current (TC=100 C) Drain Current-Pulsed Gate-to-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Total Power Dissipation (TC=25 C) Linear Derating Factor Operating Junction and Storage Temperature Range Maximum Lead Temp. for Soldering Purposes, 1/8" from case for 5-seconds 300

Value 800 2 1.3
1 O
Units V A A V mJ A mJ V/ns W W/ C
8 + 30 _ 213 2 8 2.0 3.1 80 0.64 - 55 to +150
O 1 O 1 O 3 O
2
C
Thermal Resistance
Symbol RJC RJA RJA Characteristic Junction-to-Case Junction-to-Ambient * Junction-to-Ambient Typ. ---Max. 1.56 40 62.5
Units
C/W
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B
(c)1999 Fairchild Semiconductor Corporation
SSW/I2N80A
N-CHANNEL POWER MOSFET
Electrical Characteristics (TC=25 C unless otherwise specified)
Symbol BVDSS BV/TJ VGS(th) IGSS IDSS RDS(on) gfs Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd Characteristic Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coeff. Gate Threshold Voltage Gate-Source Leakage , Forward Gate-Source Leakage , Reverse Drain-to-Source Leakage Current Static Drain-Source On-State Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain("Miller") Charge Min. Typ. Max. Units 800 -2.0 -----------------1.06 ------1.56 425 45 19 15 22 38 18 22 3.8 11.6 --3.5 100 -100 25 250 6.0 -550 55 25 40 55 85 45 30 --nC ns pF A V V/ C V nA
Test Condition VGS=0V,ID=250A ID=250A VGS=30V VGS=-30V VDS=800V VDS=640V,TC=125 C VGS=10V,ID=0.85A VDS=50V,ID=0.85A
4 O* 4 O
See Fig 7
VDS=5V,ID=250A
VGS=0V,VDS=25V,f =1MHz See Fig 5 VDD=400V,ID=2A, RG=16 See Fig 13
45 OO
VDS=640V,VGS=10V, ID=2A See Fig 6 & Fig 12
45 OO
Source-Drain Diode Ratings and Characteristics
Symbol IS ISM VSD trr Qrr Characteristic Continuous Source Current Pulsed-Source Current Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge
1 O 4 O
Min. Typ. Max. Units --------290 0.8 2 8 1.4 --A V ns C
Test Condition Integral reverse pn-diode in the MOSFET TJ=25 C,IS=1.7A,VGS=0V TJ=25 C,IF=2A diF/dt=100A/s
4 O

Notes ; 1 O Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature 2 O L=100mH, I AS=2A, VDD=50V, RG=27, Starting T J =25 C _ _ _ 3 O ISD < 2A, di/dt <90A/s, VDD
N-CHANNEL POWER MOSFET
Fig 1. Output Characteristics
15V 10V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom : 4.5 V
SSW/I2N80A
Fig 2. Transfer Characteristics
[A] ID , Drain Current
0 10
V GS
ID , Drain Current
[A]
Top :
0 10
10-1
10-1
150 oC 25 oC @ Notes : 1. V = 0 V GS 2. V = 50 V DS - 55 oC 3. 250 s Pulse Test 6 8 10
10
-2
@ Notes : 1. 250 s Pulse Test 2. T = 25 oC C 100 101
10-1
10
-2
2
4
VDS , Drain-Source Voltage [V] [A]
VGS , Gate-Source Voltage [V]
Fig 3. On-Resistance vs. Drain Current
RDS(on) , [ ] Drain-Source On-Resistance
15
Fig 4. Source-Drain Diode Forward Voltage
VGS = 10 V 10
IDR , Reverse Drain Current
10 0
5
VGS = 20 V
1 -1 0 @Nts: oe 1 VGS = 0 V . 2 oC 5 2 2 0 s P l e T s .5 us et
@ N t : TJ = 2 oC oe 5 0 0 2 4 6 8
10 C 5 1 -2 0 02 .
o
04 .
06 .
08 .
10 .
12 .
ID , Drain Current [A]
VSD , Source-Drain Voltage [V]
Fig 5. Capacitance vs. Drain-Source Voltage
600 C = C + C ( Cds= shorted ) iss gs gd C iss C =C +C oss ds gd C =C rss gd 400
Fig 6. Gate Charge vs. Gate-Source Voltage
[V]
VDS = 160 V V = 400 V DS V = 640 V DS
[pF]
10
VGS , Gate-Source Voltage
Capacitance
5
200
C oss C rss
@ Notes : 1. V = 0 V GS 2. f = 1 MHz
@ Notes : I = 2.0 A D 0 0 5 10 15 20 25
0 0 10
1 10
VDS , Drain-Source Voltage [V]
QG , Total Gate Charge [nC]
SSW/I2N80A
BVDSS , (Normalized) Drain-Source Breakdown Voltage
N-CHANNEL POWER MOSFET
Fig 8. On-Resistance vs. Temperature
RDS(on) , (Normalized) Drain-Source On-Resistance
3.0
Fig 7. Breakdown Voltage vs. Temperature
1.2
2.5
1.1
2.0
1.0
1.5
1.0 @ Notes : 1. V = 10 V GS 2. I = 1.0 A D
0.9
@ Notes : 1. V = 0 V GS 2. I = 250 A D
0.5
0.8 -75
-50
-25
0
25
50
75
100
125
150
175
0.0 -75
-50
-25
0
25
50
75
100
125
150
175
TJ , Junction Temperature [ oC]
TJ , Junction Temperature [ oC]
Fig 9. Max. Safe Operating Area
[A]
Operation in This Area is Limited by R DS(on) 10
1
Fig 10. Max. Drain Current vs. Case Temperature
2.5
[A]
10 s 100 s 1 ms
ID , Drain Current
ID , Drain Current
2.0
1.5
0 10
10 ms DC
1.0
-1 10
@ Notes : 1. T = 25 oC C 2. T = 150 oC J 3. Single Pulse
0.5
-2 10
1 10
102
103
0.0 25
50
75
100
125
150
VDS , Drain-Source Voltage [V]
Tc , Case Temperature [ oC]
Fig 11. Thermal Response
Thermal Response
100 D=0.5 0.2 0.1 10- 1 0.05 0.02 0.01 @ Notes : 1. Z J C (t)=1.56
o C/W
Max.
2. Duty Factor, D=t /t2 1 3. TJ M -TC =PD M *Z J C (t)
Z (t) ,
PDM
single pulse
t1 t2
JC
10- 2 10- 5
10- 4
10- 3
10- 2
10- 1
100
101
t 1 , Square Wave Pulse Duration
[sec]
N-CHANNEL POWER MOSFET
SSW/I2N80A
Fig 12. Gate Charge Test Circuit & Waveform
* Current Regulator *
50KO 12V 200nF 300nF
Same Type as DUT
VGS Qg
10V
VDS VGS DUT
3mA
Qgs
Qgd
R1
Current Sampling (I G) Resistor
R2
Current Sampling (I D) Resistor
Charge
Fig 13. Resistive Switching Test Circuit & Waveforms
RL Vout Vin RG DUT 10V Vin
10%
Vout VDD
( 0.5 rated V DS )
90%
td(on) t on
tr
td(off) t off
tf
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
LL VDS
Vary tp to obtain required peak ID
BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD BVDSS IAS C VDD VDD
tp
ID
RG DUT 10V
tp
ID (t) VDS (t) Time
SSW/I2N80A
N-CHANNEL POWER MOSFET
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+ VDS --
IS L Driver RG VGS
Same Type as DUT
VGS
VDD
* dv/dt controlled by "R * G * IS controlled by Duty Factor "D"
VGS ( Driver )
Gate Pulse Width D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
IS ( DUT ) IRM
di/dt
Body Diode Reverse Current
VDS ( DUT )
Body Diode Recovery dv/dt
Vf
VDD
Body Diode Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM CoolFETTM CROSSVOLTTM E2CMOSTM FACTTM FACT Quiet SeriesTM FAST(R) FASTrTM GTOTM HiSeCTM
DISCLAIMER
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

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